Duration
Developing AMBA-compliant Modules for System-On-Chip Designs
3 days
Overview
The confluence of FPGAs and processor cores has allowed embedded systems and reconfigurable digital logic to coexist in a single integrated circuit. This has resulted in a paradigm shift in high performance computing, whereby computing intensive, time-critical algorithms such as complex digital filters, ray tracing, numerical weather prediction and financial derivative computation, are now computed in hardware under the supervision of the firmware running on the processor cores.
This course emphasises on the development and implementation of custom hardware IPs with the ARM processor over the AMBA bus. The course also covers the development of applications in C to control the hardware.
Course highlight
Participants would be using the Terasic DE0-Nano-SoC/Atlas-SoC Development Board based on the Altera Cyclone V FPGA.
What You Will Learn
This course concentrates on the theoretical and practical knowledge to allow participants to achieve the following learning outcomes. Upon completing the course, participants would be able to:
- Understand the interactions between the processor's firmware and the underlying hardware
- Gain fundamental knowledge of the ARM AMBA bus
- Develop and implement AMBA-compliant custom peripherals
- Control custom peripherals with applications written in C
Who Should Attend
This course is particularly suited for engineers involved in ARM-based system-onchip designs, verification and testing.
Prerequisites
Participants must have a degree in electronics (and related) engineering with an understanding of digital systems. They must be familiar with Verilog for developing synthesizable digital systems and a good knowledge of C programming, especially in the embedded environment.
Course Methodology
This course is presented in a workshop style with example-led lectures interlaced with demonstrations and hands-on practical for maximum understanding.
Introduction
- Overview of the De0-Nano-SoC
- Architecture of the hard processor-FPGA interconnect
- Memory spaces of the ARM core and FPGA
Custom IP with Qsys
- Developing a custom peripheral
- Generating the hardware environment
- Programming the FPGA
- Hands-on practical: Developing A Simple IP (Hardware)
ARM Bare Metal Programming
- The ARM-NONE-EABI environment
- "Hello Bare-Metal World"
- Booting the ARM
- Hands-on practical: Getting Started with ARM-NONE-EABI
- Accessing and controlling IPs with C
- Hands-on practical: Developing A Simple IP (Firmware)
The AMBA Bus
- Overview of APB, AHB and AXI
- Global signals and clocking
- Read and write transactions
- Hands-on practical: Accessing Registers
AMBA-compliant IP
- Developing an AMBA-compliant IP
- Transaction pipelining and data reordering
- Hands-on practical: AMBA-compliant Up/Down Counter
Modular Programming
- Benefits of a layered program development framework
- Writing portable and reusable code
Programme scope, delivery arrangements and suitability are confirmed during enquiry.